P8xC591是8位高性能单片机，是80C51系列的衍生型,带有在片CAN控制器。它使用高效的80C51指令集并包括SJA1000
CAN控制器的PeliCAN功能。完全的静态核提供扩展的电存储设施，振荡器可以被停止且易重新启动，但不丢失数据。改进的1:1内部时钟预定标器在12
MHz外部时钟率时能达到500 ns指令周期。
此款单片机经由先进的CMOS处理生产，设计用于汽车和一般的工业应用。除了具有80C51标准的特点之外,针对上述应用该器件还提供了专用的硬件功能。
P8xC591有以下两种型号:
*P83C591 (with ROM)
*P87C591 (with OTP)
P8xC591融合了P87C554和SJA1000的功能并且具有以下增强性的特点：
*增强的CAN接收中断；
*扩展的接收滤波器；
*接收滤波器“在使用中”能被更改。
P8xC591和P87C554之间的主要差别在于：前者具有在片CAN控制器、6-输入ADC、低启动复位、为44-pin引脚。
8xC591具有的与80C51相关的特点：
*Full
static 80C51 Central Processing Unit available as OTP, ROM and ROMless
*16 Kbytes internal Program Memory expandable externally to 64 Kbytes
*512 bytes on-chip Data RAM expandable externally to 64 Kbytes
*Three 16-bit timers/counters T0, T1 (standard 80C51) and additional
T2 (capture & compare)
*10-bit ADC with 6 multiplexed analog inputs with fast 8-bit ADC
option
*Two 8-bit resolution, Pulse Width Modulated outputs
*32 I/O port pins in the standard 80C51 pinout
*I2C-bus serial I/O port with byte oriented master and slave functions
*On-chip Watchdog Timer T3
*Extended temperature range: -40 to +85 Cel
*Accelerated (prescaler 1:1) instruction cycle time 500 ns @ 12
MHz
*Operation voltage range: 5 V +- 5 pct
*Security bits:
-ROM version has 2 bits
-OTP/EPROM version has 3 bits
*32 bytes Encryption array
*4 level priority interrupt, 15 interrupt sources
*Full-duplex enhanced UART with programmable Baudrate Generator
*Power Control Modes:
-Clock can be stopped and resumed
-Idle Mode
-Power-down Mode
-ADC active in Idle Mode
*Second DPTR register
*ALE inhibit for EMI reduction
*Programmable I/O port pins (pseudo bi-directional, push-pull, high
impedance, open drain)
*Wake-up from Power-down by external interrupts
*Software reset bit (AUXR1.5)
*Low active reset pin
*Power-on detect reset
*Once mode
8xC591具有的与CAN相关的特点：
*CAN
2.0B active controller, supporting 11-bit Standard and 29-bit Extended
indentifiers
*1 Mbit/s CAN bus speed with 8 MHz clock achievable
*64 byte receive FIFO (can capture sequential Data Frames from the
same source as required by the Transport Layer of higher protocols
such as DeviceNet, CANopen and OSEK)
*13 byte transmit buffer
*Enhanced PeliCAN core (from the SJA1000 stand-alone CAN2.0B controller)
PeliCAN特点：
*Four
independently configurable Screeners (Acceptance Filters)
*Each Screener has two 32-bit specifies:
-32-bit Match and
-32-bit Mask
-32-bits of Mask per Screener allows unique Group addressing per
Screener
*Higher layer protocols especially supported in Standard CAN format
with:
*Up to four, 11-bit ID Screeners that also Screen the two (2) Data
Bytes
i.e., Data Frames are Screened by the CAN ID and by Data Byte content
*Up to eight, 11-bit ID Screeners half of which also Screen the
first Data Byte
*All Screeners are changeable "on the fly"
*Listen Only Mode, Self Test Mode
*Error Code Capture, Arbitration Lost Capture, readable Error Counters
